PALCE29MA16H-25

FINAL COM’L: H-25 PALCE29MA16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS s High-performance semicustom logic s Register/Latch Preload permits full logic s s s s replacement; Electrically Erasable (EE) technology allows reprogrammability 16 bidirectional user-programmable I/O logic macrocells for Combinatorial/Registered/ Latched operation Output Enable controlled by a pin or product terms Varied product term distribution for increased design flexibility Programmable clock selection with common pin clock/latch enable (LE) or individual product term clock/LE with LOW/HIGH clock/ LE polarity verification s High speed (tPD = 25 ns, fMAX = 33 MHz and fMAX internal = 50 MHz) s Full-function AC and DC testing at the factory for high programming and functional yields and high reliability s 24-pin 300 mil SKINNYDIP and 28-pin plastic leaded chip carrier packages s Extensive third-party software and programmer support through FusionPLD partners GENERAL DESCRIPTION The PALCE29MA16 is a high-speed, EE CMOS Programmable Array Logic (PAL) device designed for general logic replacement in TTL or CMOS digital systems. It offers high speed, low power consumption, high programming yield, fast programming, and excellent reliability. PAL devices combine the flexibility of custom logic with the off-the-shelf availability of standard products, providing major advantages over other BLOCK DIAGRAM CLK/LE I/OF 7 I/OF 6 I/O7 I/O6 I/O 5 I/O 4 I/OF5 I/OF4 I/O ...