PC745

Features 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz (PC755) 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x) PD Typical 6.4W at 400 MHz, Full Operating Conditions Nap, Doze and Sleep Modes for Power Savings Superscalar (3 Instructions per Clock Cycle) Two Instruction + Branch 4 Beta Byte Virtual Memory, 4-GByte of Physical Memory 64-bit Data and 32-bit Address Bus Interface 32-KB Instruction and Data Cache Six Independent Execution Units Write-back and Write-through Operations fINT max = 400 MHz (TBC) fBUS max = 100 MHz Voltage I/O 2.5V/3.3V; Voltage Int 2.0V PowerPC 755/745 32-bit RISC Microprocessor Description The PC755 and PC745 PowerPC® microprocessors are high-performance, lowpower, 32-bit implementations of the PowerPC Reduced Instruction Set Computer (RISC) architecture, especially enhanced for embedded applications. The PC755 and PC745 microprocessors differ only in that the PC755 features an enhanced, dedicated L2 cache interface with on-chip L2 tags. The PC755 is a drop-in replacement for the award winning PowerPC 750 microprocessor and is footprint and user software code compatible with the MPC7400 microprocessor with AltiVec technology. The PC745 is a drop-in replacement for the PowerPC 740 microprocessor and is also footprint and user software code compatible with the PowerPC 603e microprocessor. PC755/745 microprocess...