DatasheetsPDF.com

PIC18LF57K42 Datasheet

Part Number PIC18LF57K42
Manufacturers Microchip
Logo Microchip
Description High-Performance Microcontrollers
Datasheet PIC18LF57K42 DatasheetPIC18LF57K42 Datasheet (PDF)

PIC18(L)F26/27/45/46/47/55/56/57K42 28/40/44/48-Pin, Low-Power High-Performance Microcontrollers with XLP Technology Description The PIC18(L)F26/27/45/46/47/55/56/57K42 microcontrollers are available in 28/40/44/48-pin devices. These devices feature a 12-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency.

  PIC18LF57K42   PIC18LF57K42






High-Performance Microcontrollers

PIC18(L)F26/27/45/46/47/55/56/57K42 28/40/44/48-Pin, Low-Power High-Performance Microcontrollers with XLP Technology Description The PIC18(L)F26/27/45/46/47/55/56/57K42 microcontrollers are available in 28/40/44/48-pin devices. These devices feature a 12-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous, DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory calibration values to help improve temperature sensor accuracy. Core Features • C Compiler Optimized RISC Architecture • Operating Speed: - Up to 64 MHz clock input - 62.5 ns minimum instruction cycle • Two Direct Memory Access (DMA) Controllers - Data transfers to SFR/GPR spaces from either Program Flash Memory, Data EEPROM or SFR/GPR spaces - User-programmable source and destination sizes - Hardware and software-triggered data transfers • System Bus Arbiter with User-Configurable Priorities for Scanner and DMA1/DMA2 with respect to the main line and interrupt execution • Vectored Interrupt Capability - Selectable high/low priority - Fixed interrupt laten.


2020-02-05 : INA2322    INA203-Q1    INA203    INA204    INA205    INA206    INA207    INA208    INA201-Q1    INA202-Q1   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)