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PLA133-97

Microchip

Low-Power DC to 160MHz 1:9 Fanout Buffer

PLA133-97 Low-Power DC to 160 MHz 1:9 Fanout Buffer IC for Automotive Features • Automotive AEC-Q100 Qualified • 1:9 LV...


Microchip

PLA133-97

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Description
PLA133-97 Low-Power DC to 160 MHz 1:9 Fanout Buffer IC for Automotive Features Automotive AEC-Q100 Qualified 1:9 LVCMOS Output Fanout Buffer from DC to 160 MHz Low Additive Phase Jitter of 60 fs RMS 8 mA Output Drive Strength Low Power Consumption for Portable Applications Automotive Applications Grade 1 Compliant Low Input-Output Delay Output-Output Skew <250 ps 2.5V to 3.3V, ±10% Operation 1.8V +10%/–5% Operation up to 67 MHz Wide Temperature Range: –40°C to +125°C Available in 16-Pin Wettable Flanks VQFN Package Applications Automotive Applications - ADAS Vision System - Infotainment and Dashboard General Description The PLA133-97 is an advanced fanout buffer designed for automotive applications and other high performance, low-power, small form factor applications. The PLA133-97 accepts a reference clock input from DC to 160 MHz and provides nine outputs of the same frequency with ultra-low additive jitter. The device is AEC-Q100 qualified. The PLA133-97 is offered in a small 3 mm x 3 mm wettable flanks VQFN-16L package. The PLA133-97 outputs can be disabled to a high impedance (tri-state) by pulling low the OE pin. When the OE pin is high, the outputs are enabled and follow the REF input signal. When the OE pin is left open, a pull-up resistor on the chip will default the OE pin to logic 1 so the outputs are enabled. CLK8 is a free running output that remains enabled when the OE pin is pulled low. Functional Block Diagram REF OE CLK8 CLK1 CLK...




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