PSMNR51-25YLH
N-channel 25 V, 0.57 mΩ, 380 A logic level MOSFET in
LFPAK56E using NextPowerS3 technology
30 September 2019
Product data sheet
1. General description
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56E package optimized for low RDSon, low IDSS leakage even when hot, high efficiency and high current. Rated to 380 A, optimized for DC load switch and hot-swap applications.
2. Features and benefits
• 100% avalanche tested at I(AS) = 190 A • Optimized for low RDS.
N-channel MOSFET
PSMNR51-25YLH
N-channel 25 V, 0.57 mΩ, 380 A logic level MOSFET in
LFPAK56E using NextPowerS3 technology
30 September 2019
Product data sheet
1. General description
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56E package optimized for low RDSon, low IDSS leakage even when hot, high efficiency and high current. Rated to 380 A, optimized for DC load switch and hot-swap applications.
2. Features and benefits
• 100% avalanche tested at I(AS) = 190 A • Optimized for low RDSon • Low leakage < 1 μA at 25 °C • Low spiking and ringing for low EMI designs • Optimized for 4.5 V gate drive • Copper-clip for low parasitic inductance and resistance • High reliability LFPAK package, qualified to 175 °C • Wave solderable; exposed leads for optimal solder coverage and visual solder inspection
3. Applications
• Hot swap • e-Fuse • Power OR-ing • DC switch / Load switch • Battery protection • Brushed and BLDC (brushless) motor control • Synchronous rectification in AC-DC and DC-DC applications
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state resistance
Dynamic characteristics
QGD
gate-drain charge
QG(tot)
total gate charge
Conditions 25 °C ≤ Tj ≤ 175 °C VGS = 10 V; Tmb = 25 °C; Fig. 2 Tmb = 25 °C; Fig. 1
VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig.