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R8A66174SP Datasheet

Part Number R8A66174SP
Manufacturers Renesas Technology
Logo Renesas Technology
Description PARALLEL-IN SERIAL-OUT DATA BUFFER
Datasheet R8A66174SP DatasheetR8A66174SP Datasheet (PDF)

R8A66174SP PARALLEL-IN SERIAL-OUT DATA BUFFER WITH FIFO REJ03F0278-0101 Rev. 1.01 Oct.06.2008 DESCRIPTION The R8A66174 is a CMOS LSI with 63-byte FIFO (First-In First-Out Memory). The commands or up to 63bytes data can be stored from 8-bit data bus. The data stored in FIFO can be outputted as serial data by executing command, and when the stored data is outputted all, R8A66174 will output an interrupt request signal. R8A66174 has 2-bit output pins (/OE, LATCH) which can set/reset outside devic.

  R8A66174SP   R8A66174SP






PARALLEL-IN SERIAL-OUT DATA BUFFER

R8A66174SP PARALLEL-IN SERIAL-OUT DATA BUFFER WITH FIFO REJ03F0278-0101 Rev. 1.01 Oct.06.2008 DESCRIPTION The R8A66174 is a CMOS LSI with 63-byte FIFO (First-In First-Out Memory). The commands or up to 63bytes data can be stored from 8-bit data bus. The data stored in FIFO can be outputted as serial data by executing command, and when the stored data is outputted all, R8A66174 will output an interrupt request signal. R8A66174 has 2-bit output pins (/OE, LATCH) which can set/reset outside devices by the command, R8A66174 can be connected to peripheral circuits that have a serial latch structure. R8A66174 is the succession product of M66300. FEATURES ● General-purpose www.DataSheet4U.com 8-bit CPU bus compatible ● Built-in 63-byte FIFO ● High-speed output (10Mbps) ● It’s able to connect to LED array driver such as R8A66160 or R8A66161 directly ● Low-noise, high-output circuit IOL=16mA, IOH=-16mA (IOL=4mA, IOH=-4mA for /INT) ● Schmitt input (/RESET) ● Wide operating supply voltage range (Vcc=3.0~3.6V or Vcc=4.5~5.5V) o ● Wide operating temperature range (Ta=-40~85 C) APPLICATION General digital equipment for industrial and home use, panel display controllers, and eraser unit controller for copying machine. PIN CONFIGURATION (TOP VIEW) WRITE INPUT WR D0 D1 D2 D3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Vcc C/D CS RESET INT OE LATCH SDATA SCLK Φ COMMAND/DATA INPUT CHIP SELECT INPUT RESET INPUT INTERRUPT REQUEST OUTPUT OUTPUT ENABLE OUTPUT LATCH OUTPUT SHIFT DAT.


2008-12-19 : BLF861A    BLF861A    VLA513-01R    VLA517-01R    KM681000C    KM681000E    KM681001A    KM681001B    KM681002A    KM681002AI   


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