S71KL256SC0 Datasheet





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S71KL256SC0 Datasheet - HyperFlash and HyperRAM Multi-Chip Package

S71KL256SC0   S71KL256SC0  

Datasheet: S71KL256SC0 datasheet

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Description: SUPPLEMENT S71KS512SC0 S71KL256SC0 S71K L512SC0 HyperFlash™ and HyperRAM™ Multi-Chip Package 1.8V/3V HyperFlash and HyperRAM™ Multi-Chip Package 3 V Distinctive Characteristics ■ Hype rFlash™ and HyperRAM™ in Multi-Chip Package (MCP) ❐ 1.8V, 512 Mb HyperFl ash and 64 Mbit HyperRAM (S71KS512SC0) ❐ 3.0V, 512 Mb HyperFlash and 64 Mbit HyperRAM (S71KL512SC0) ❐ 3.0V, 256 M b HyperFlash and 64 Mbit HyperRAM (S71K L256SC0) ❐ FBGA 24-ball, 6  8  1.0 mm package ■ HyperBus Interface 1.8V I/O, 12 bus signals • Differe ntial clock (CK/CK#) ❐ 3.0V I/O, 11 b us signals • Single ended clock (CK) ❐ Chip Select (CS#) ❐ 8-bit data bu s (DQ[7:0]) ❐ Read-Write Data Strobe (RWDS) • Bidirectional Data Strobe/Mask


Manufacture Part Number Description

Cypress Semiconductor

S71KL256SC0

HyperFlash and HyperRAM Multi-Chip Package




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