S9KEA128P80M48SF0
KEA128 Sub-Family Data Sheet Supports the following: S9KEAZ64AMLK(R),
S9KEAZ128AMLK(R), S9KEAZ64AVLK...
S9KEA128P80M48SF0
KEA128 Sub-Family Data Sheet Supports the following: S9KEAZ64AMLK(R),
S9KEAZ128AMLK(R), S9KEAZ64AVLK(R), S9KEAZ128AVLK(R),
S9KEAZ64ACLK(R), S9KEAZ128ACLK(R), S9KEAZ64AMLH(R),
S9KEAZ128AMLH(R), S9KEAZ64AVLH(R), S9KEAZ128AVLH(R),
S9KEAZ64ACLH(R) and S9KEAZ128ACLH(R)
Rev. 6 — 30 January 2024
Data sheet
1 Key features
1.1 Operating characteristics
Voltage range: 2.7 to 5.5 V Flash write
voltage range: 2.7 to 5.5 V Temperature range (ambient): -40 to 125°C
1.2 Performance
Up to 48 MHz Arm® Cortex-M0+ core Single cycle 32-bit x 32-bit multiplier Single cycle I/O access port
1.3 Memories and memory interfaces
Up to 128 KB flash Up to 16 KB RAM
1.4 Clocks
Oscillator (OSC) - supports 32.768 kHz crystal or 4 MHz to 24 MHz crystal or ceramic resonator; choice of low power or high gain oscillators
Internal clock source (ICS) - internal FLL with internal or external reference, 37.5 kHz pre-trimmed internal reference for 48 MHz system clock
Internal 1 kHz low-power oscillator (LPO)
1.5 System peripherals
Power management module (PMC) with three power modes: Run, Wait, Stop Low-
voltage detection (LVD) with reset or interrupt, selectable trip points Watchdog with independent clock source (WDOG) Programmable cyclic redundancy check module (CRC) Serial wire debug interface (SWD) Aliased SRAM bitband region (BIT-BAND) Bit manipulation engine (BME)
NXP Semiconductors
S9KEA128P80M48SF0
KEA128 Sub-Family Data Sheet
1.6 Security and i...