SAA4951

INTEGRATED CIRCUITS DATA SHEET SAA4951 Memory controller Preliminary specification File under Integrated Circuits, IC02 April 1994 Philips Semiconductors Preliminary specification Memory controller FEATURES Support for acquisition, display and deflection PLL 50/100 (or 60/120) Hz scan conversion for different input data rates: 12, 13.5, 16 and 18 MHz Support for 4:3 and 14:9 display on a 16:9 screen (horizontal compression) Support for Y:U:V data rates of 4:1:1, 4:2:2, and 4:4:4 Horizontal zoom Still picture Support for one or two field memories Support for different video memory types like TMS 1050/60/70/2970 Progressive scan Programmable via microcontroller port Golden Scart option Support for Multi-PIP. QUICK REFERENCE DATA SYMBOL VDD IDD Tamb PARAMETER supply voltage supply current operating ambient temperature 4.5 − 0 MIN. 5.0 50 − TYP. 5.5 − +70 MAX. GENERAL DESCRIPTION SAA4951 The memory controller SAA4951 has been designed for high end TV sets using 2fH-technics. The circuit provides all necessary write, read and clock pulses to control different field memory concepts. Furthermore the drive signals for the horizontal and vertical deflection power stages are generated. The device is connected to a microcontroller via an 8-bit data bus. The controller receives commands via the I2C-bus. Due to this fact the start and stop conditions of the main output control signals are programmable and the SAA4951 can be set in different function modes depe...