SAM9263

SAM9263 Atmel | SMART ARM-based Embedded MPU DATASHEET Description The Atmel® | SMART ARM926-based SAM9263 32-bit microprocessor is architectured on a 9-layer matrix, allowing a maximum internal bandwidth of nine 32-bit buses. It also features two independent external memory buses, EBI0 and EBI1, capable of interfacing with a wide range of memory devices and an IDE hard disk. Two external buses prevent bottlenecks, thus guaranteeing maximum performance. The SAM9263 embeds an LCD Controller supported by a Two D Graphics Accelerator and a 2-channel DMA Controller, and one Image Sensor Interface. It also integrates several standard peripherals, such as USART, SPI, TWI, Timer Counters, PWM Generators, Multimedia Card Interface and one CAN Controller. When coupled with an external GPS engine, the SAM9263 provides the ideal solution for navigation systems. Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16 Features  ARM926EJ-S™ ARM® Thumb® Processor ̶ DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration ̶ 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer ̶ 220 MIPS at 200 MHz ̶ Memory Management Unit ̶ EmbeddedICE™, Debug Communication Channel Support ̶ Mid-level Implementation Embedded Trace Macrocell™  Bus Matrix ̶ Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth ̶ Boot Mode Select Option, Remap Command  Embedded Memories ̶ One 128 Kbyte Internal ROM, Single-cycle Access at Maximum Bus Matrix Speed ̶ One 80 Kbyte Intern...