SI2324DS

www.DataSheet.co.kr SPICE Device Model Si2324DS Vishay Siliconix N-Channel 100 V (D-S) MOSFET DESCRIPTION The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C to + 125 °C temperature ranges under the pulsed 0 V to 10 V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. CHARACTERISTICS N-Channel Vertical DMOS Macro Model (Subcircuit Model) Level 3 MOS Apply for both Linear and Switching Application Accurate over the - 55 °C to + 125 °C Temperature Range Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics SUBCIRCUIT MODEL SCHEMATIC D CGD M2 G RG Gy – + Gx CGS M1 R1 3 DBD ETCV S Note This document is intended as a SPICE modeling guideline and does not constitute a commercial product datasheet. Designers should refer to the appropriate datasheet of the same number for guaranteed specification limits. Document Number: 63245 S11-1189-Rev. A, 27-Jun-11 www.vishay.com 1 Datasheet pdf - http://www.DataSheet4U.net/ This document is subject t...