FANOUT BUFFER
Si53159
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE OUTPUT FANOUT BUFFER
Features
PCI-Express Gen 1, Gen 2,
...
Description
Si53159
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 NINE OUTPUT FANOUT BUFFER
Features
PCI-Express Gen 1, Gen 2,
Up to nine buffered clocks
Gen 3, and Gen 4 common clock 100 to 210 MHz clock input range
compliant
Supports Serial-ATA (SATA) at
100 MHz
Low power push-pull differential output buffers
No termination resistors required
I2C support with readback capabilities
Supports spread spectrum input
Extended temperature: –40 to 85 oC
Output enable pins for all
3.3 V power supply
buffered clocks
48-pin QFN package
Applications
Network attached storage Multi-function printers
Wireless access point Servers
Description
The Si53159 is a high-performance, low additive jitter, PCIe clock buffer that can fan out nine PCIe clocks. The clock outputs are compliant to PCIe Gen 1, Gen 2, Gen 3, and Gen 4 specifications. The device has six hardware output enable control pins for enabling and disabling differential outputs. The small footprint and low power consumption makes the Si53159 the ideal clock solution for consumer and embedded applications. Measuring PCIe clock jitter is quick and easy with the Silicon Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcielearningcenter.
Functional Block Diagram
Ordering Information: See page 18.
Pin Assignments
NC NC VSS_DIFF VSS_CORE NC NC DIFFIN DIFFIN VDD_CORE CKPWRGD/PDB1 SDATA SCLK
48 47 46 45 44 43 42 41 40 39 38 37
VDD_DIFF 1
36 DIFF8
VDD_DIFF 2
35 DIFF8
OE_DIF...
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