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SI5320 Datasheet

Part Number SI5320
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description SONET/SDH PRECISION CLOCK MULTIPLIER IC
Datasheet SI5320 DatasheetSI5320 Datasheet (PDF)

Si5320 SONET/SDH PRECISION CLOCK MULTIPLIER IC Features  Ultra-low-jitter clock output with jitter generation as low as 0.3 psRMS  No external components (other than a resistor and standard bypassing)  Input clock ranges at 19, 39, 78, 155, 311, and 622 MHz  Output clock ranges at 19, 155, or 622 MHz  Digital hold for loss of input clock  Support for forward and reverse FEC clock scaling  Selectable loop bandwidth  Loss-of-signal alarm output  Low power  Small size (9x9 mm) Applic.

  SI5320   SI5320






Part Number SI5328
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER
Datasheet SI5320 DatasheetSI5328 Datasheet (PDF)

Si5328 I T U - T G. 8 2 6 2 S YNCHRONOUS E THERNET J ITTER- A TTENUATING CLOCK MULTIPLIER Features  Fully-compliant with ITU-T G.8262, EEC options 1 and 2.  Generates any frequency from 8 kHz to 808 MHz.  Dual clock outputs with selectable signal format (LVPECL, LVDS, CML, CMOS)  LOL, LOS, FOS alarm outputs  Ultra-low jitter clock outputs with  I2C or SPI programmable jitter generation as low rms (12 kHz–20 MHz) as 0.3 ps  On-chip voltage regulator for 2.5 ±10% or 3.3 V ±10% .

  SI5320   SI5320







Part Number SI5327
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Datasheet SI5320 DatasheetSI5327 Datasheet (PDF)

Si5327 ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR Features  Generates any frequency from 2 kHz  Dual clock inputs with manually to 808 MHz from an input frequency controlled hitless switching of 2 kHz to 710 MHz  Free run and VCO freeze modes  Ultra-low jitter clock outputs with jitter  Support for ITU G.709 and custom generation as low as 0.5 ps rms FEC ratios (255/238, 255/237, (12 kHz–20 MHz) 255/236)  Integrated loop filter with selectable  LOL and LOS alar.

  SI5320   SI5320







Part Number SI5326
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Datasheet SI5320 DatasheetSI5326 Datasheet (PDF)

Si5326 ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR Features  Generates any frequency from 2 kHz  Dual clock outputs with selectable to 945 MHz and select frequencies to signal format 1.4 GHz from an input frequency of  Support for ITU G.709 and custom 2 kHz to 710 MHz FEC ratios (255/238, 255/237,  Ultra-low jitter clock outputs with jitter 255/236) generation as low as 0.3 ps rms  LOL, LOS, FOS alarm outputs (50 kHz–80 MHz)  Digitally-controlled output phase  I.

  SI5320   SI5320







Part Number SI5325
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description uP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER
Datasheet SI5320 DatasheetSI5325 Datasheet (PDF)

Si5325 µP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER Features  Not recommended for new  Dual clock outputs with designs. For alternatives, see the selectable signal format Si533x family of products. (LVPECL, LVDS, CML, CMOS)  Generates frequencies from  Support for ITU G.709 and 2 kHz to 945 MHz and select custom FEC ratios (255/238, frequencies to 1.4 GHz from an 255/237, 255/236) input frequency of 10 to 710 MHz LOS, FOS alarm outputs    Low jitter clock outputs with jitter .

  SI5320   SI5320







Part Number SI5324
Manufacturers Silicon Laboratories
Logo Silicon Laboratories
Description ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
Datasheet SI5320 DatasheetSI5324 Datasheet (PDF)

Si5324 ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR Features  Generates any frequency from  Freerun, Digital Hold operation 2 kHz to 945 MHz and select  Configurable signal format per frequencies to 1.4 GHz from an output (LVPECL, LVDS, CML, input frequency of 2 kHz to CMOS) 710 MHz  Support for ITU G.709 and custom  Ultra-low jitter clock outputs as low FEC ratios (255/238, 255/237, as 290 fs rms (12 kHz–20 MHz), 255/236, 239/237, 66/64, 239/238, 320 fs rms (5.

  SI5320   SI5320







SONET/SDH PRECISION CLOCK MULTIPLIER IC

Si5320 SONET/SDH PRECISION CLOCK MULTIPLIER IC Features  Ultra-low-jitter clock output with jitter generation as low as 0.3 psRMS  No external components (other than a resistor and standard bypassing)  Input clock ranges at 19, 39, 78, 155, 311, and 622 MHz  Output clock ranges at 19, 155, or 622 MHz  Digital hold for loss of input clock  Support for forward and reverse FEC clock scaling  Selectable loop bandwidth  Loss-of-signal alarm output  Low power  Small size (9x9 mm) Applications  SONET/SDH line/port cards  Optical modules  Core switches  Digital cross connects  Terabit routers Description The Si5320 is a precision clock multiplier designed to exceed the requirements of high-speed communication systems, including OC-192/OC-48 and 10 GbE. This device phase locks to an input clock in the 19, 39, 78, 155, 311, or 622 MHz frequency range and generates a frequency-multiplied clock output that can be configured for operation in the 19, 155, or 622 MHz range. Silicon Laboratories’ DSPLL™ technology delivers all PLL functionality with unparalleled performance while eliminating external loop filter components, providing programmable loop parameters, and simplifying design. FEC rates are supported with selectable 255/ 238 or 238/255 scaling of the clock multiplication ratios. The Si5320 establishes a new standard in performance and integration for ultra-low-jitter clock generation. It operates from a single 3.3 V supply. Functional Block Diagram REXT VS.


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