D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Extended Temperature Performance of
−55°C to 125°...
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Extended Temperature Performance of
−55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification D Qualification Pedigree† D High-Performance Floating-Point Digital
Signal Processor (DSP) SM320C32-50EP (5 V) − 40-ns Instruction Cycle Time − 275 MOPS − 50 MFLOPS − 25 MIPS SM320C32-60EP (5 V) − 33-ns Instruction Cycle Time − 330 MOPS − 60 MFLOPS − 30 MIPS
D 32-Bit High-Performance CPU D 16- / 32-Bit Integer and 32- / 40-Bit
Floating-Point Operations
D 32-Bit Instruction Word, 24-Bit Addresses D Two 256 × 32-Bit Single-Cycle, Dual-Access
On-Chip RAM Blocks
D Flexible Boot-Program Loader D On-Chip Memory-Mapped Peripherals:
− One Serial Port − Two 32-Bit Timers − Two-Channel Direct Memory Access
(DMA) Coprocessor With Configurable Priorities
D Enhanced External Memory Interface That
Supports 8- / 16- / 32-Bit-Wide External RAM for Data Access and Program Execution From 16- / 32-Bit-Wide External RAM
SM320C32ĆEP DIGITAL SIGNAL PROCESSOR
SGUS038 − AUGUST 2002
D SMJ320C30 and SMJ320C31 Object Code
Compatible
D Fabricated Using Enhanced Performance
Implanted
CMOS (EPIC) Technology by Texas Instruments
D 144-Pin Plastic Quad Flatpack
( PCM Suffix ) 5 V
D Eight Extended-Precision Registers D Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
D Two Low-Power Modes D Two- and Three-Operand Instructions D Parall...