a
FEATURES High Speed Version of SMP08 Internal Hold Capacitors Low Droop Rate TTL/CMOS Compatible Logic Inputs Single o...
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FEATURES High Speed Version of SMP08 Internal Hold
Capacitors Low Droop Rate TTL/
CMOS Compatible Logic Inputs Single or Dual Supply Operation Break-Before-Make Channel Addressing Compatible With CD4051 Pinout Low Cost APPLICATIONS Multiple Path Timing Deskew for A.T.E. Memory Programmers Mass Flow/Process Control Systems Multichannel Data Acquisition Systems Robotics and Control Systems Medical and Analytical Instrumentation Event Analysis Stage Lighting Control
INPUT 3
Octal Sample-and-Hold with Multiplexed Input SMP18
FUNCTIONAL BLOCK DIAGRAM
(LSB) A 11 (MSB) C 9 B 10 INH 6 8 DGND 1 OF 8 DECODER 16 VDD SW 13 CH0OUT
SW
14 CH1OUT
SW
15 CH2OUT
SW
12 CH3OUT
SW
1
CH4OUT
SW
5
CH5OUT
GENERAL DESCRIPTION
The SMP18 is a monolithic octal sample-and-hold; it has eight internal buffer
amplifiers, input multiplexer, and internal hold
capacitors. It is manufactured in an advanced oxide isolated
CMOS technology to obtain high accuracy, low droop rate, and fast acquisition time. The SMP18 has a typical linearity error of only 0.01% and can accurately acquire a 10-bit input signal to ± 1/2 LSB in less than 2.5 microseconds. The SMP18’s output swing includes the negative supply in both single and dual supply operation. The SMP18 was specifically designed for systems that use a calibration cycle to adjust a multiple of system parameters. The low cost and high level of integration make the SMP18 ideal for calibration requirements that have previously required an ASIC, or high ...