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SN54AHCT16541 Datasheet

Part Number SN54AHCT16541
Manufacturers Texas Instruments
Logo Texas Instruments
Description 16-BIT BUFFERS/DRIVERS
Datasheet SN54AHCT16541 DatasheetSN54AHCT16541 Datasheet (PDF)

SN54AHCT16541, SN74AHCT16541 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS339H – MARCH 1996 – REVISED JANUARY 2000 D Members of the Texas Instruments Widebus ™ Family D EPIC ™ (Enhanced-Performance Implanted CMOS) Process D Inputs Are TTL-Voltage Compatible D Distributed VCC and GND Pins Minimize High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D Latch-Up Performance Exceeds 250 mA Per JESD 17 D Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink.

  SN54AHCT16541   SN54AHCT16541






Part Number SN54AHCT16540
Manufacturers Texas Instruments
Logo Texas Instruments
Description 16-BIT BUFFERS/DRIVERS
Datasheet SN54AHCT16541 DatasheetSN54AHCT16540 Datasheet (PDF)

SN54AHCT16540, SN74AHCT16540 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS338H – MARCH 1996 – REVISED JANUARY 2000 D Members of the Texas Instruments Widebus ™ Family D EPIC ™ (Enhanced-Performance Implanted CMOS) Process D Inputs Are TTL-Voltage Compatible D Distributed VCC and GND Pins Minimize High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 20.

  SN54AHCT16541   SN54AHCT16541







16-BIT BUFFERS/DRIVERS

SN54AHCT16541, SN74AHCT16541 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS339H – MARCH 1996 – REVISED JANUARY 2000 D Members of the Texas Instruments Widebus ™ Family D EPIC ™ (Enhanced-Performance Implanted CMOS) Process D Inputs Are TTL-Voltage Compatible D Distributed VCC and GND Pins Minimize High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D Latch-Up Performance Exceeds 250 mA Per JESD 17 D Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings description The ’AHCT16541 devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state. SN54AHCT16541 . . . WD PACKAGE SN74AHCT16541 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE1 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 1Y5 8 1Y6 9 GND 10 1Y7 11 1Y8 12 2Y1 13 2Y2 14 GND 15 2Y3 16 2Y4 17 VCC 18 2Y5 19 2Y6 20 GND 21 2Y7 22 2Y8 23 2OE1 24 48 1OE2 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCC 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OE2 To ensure the high-i.


2022-11-18 : SN74AHCT1G08    SN74AHCT1G02    SN74AHCT125-EP    SN74AHCT1G00    SN74AHCT125-Q1    SN74AHCT126-EP    SN54AHCT16541    SN54AHCT174    SN74AHCT174    SN74AHCT1G04   


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