Octal D-Type Transparent Latches
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A OCTAL DĆTYPE TRANSPARENT LATCHES WITH 3ĆSTATE OUTPUTS
SDAS048D − DECEMB...
Description
SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A OCTAL DĆTYPE TRANSPARENT LATCHES WITH 3ĆSTATE OUTPUTS
SDAS048D − DECEMBER 1989 − REVISED JANUARY 1995
3-State Buffer-Type Outputs Drive Bus
Lines Directly
Bus-Structured Pinout True Logic Outputs Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N) and Ceramic (J) 300-mil DIPs, and Ceramic Flat (W) Packages
description
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
SN54ALS573C, SN54AS573A . . . J OR W PACKAGE SN74ALS573C, SN74AS573A . . . DW OR N PACKAGE
(TOP VIEW)
OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10
20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 LE
SN54ALS573C, SN54AS573A . . . FK PACKAGE (TOP VIEW)
1Q
VCC
OE
1D
2D
While the latch-enable (LE) input is high, outputs (Q) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines ...
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