SN54HC393, SN74HC393 DUAL 4ĆBIT BINARY COUNTERS
D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To ...
SN54HC393, SN74HC393 DUAL 4ĆBIT BINARY COUNTERS
D Wide Operating
Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 13 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Dual 4-Bit Binary Counters With Individual
Clocks
D Direct Clear for Each 4-Bit Counter D Can Significantly Improve System
Densities by Reducing Counter Package Count by 50 Percent
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
SN54HC393 . . . J OR W PACKAGE SN74HC393 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1CLK
1CLR
1QA 1QB 1QC 1QD GND
1 2 3 4 5 6 7
14 VCC 13 2CLK
12 2CLR
11 2QA 10 2QB 9 2QC 8 2QD
SN54HC393 . . . FK PACKAGE (TOP VIEW)
1CLR 1CLK NC VCC 2CLK
description/ordering information
The ’HC393 devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices comprise two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK) input. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The ’HC393 devices have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.
1QA NC
1QB NC
1QC
3 2 1 20 19 4 18 5 17 6 16 7 15 8 14
9 10 11 12 13
2CLR NC 2QA NC 2QB
1QD GND
NC 2QD 2QC
NC − No internal connection
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP − N
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