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SN54LS10 Datasheet PDF

NAND GATE

SN54LS10 | Motorola Inc
TRIPLE 3-INPUT NAND GATE
Download SN54LS10 Datasheet
Download SN54LS10 Datasheet

SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND 14 1 J SUFFIX CERAMIC CASE 632-08 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — .

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SN54LS10 | Texas Instruments
TRIPLE 3-INPUT POSITIVE-NAND GATES
Download SN54LS10 Datasheet
Download SN54LS10 Datasheet

SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES SDLS035A – DECEMBER 1983 – REVISED APRIL 2003 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. •POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 2003, Texas Instruments Inco.

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SN54LS10 | Texas Instruments
TRIPLE 3-INPUT POSITIVE-NAND GATES
Download SN54LS10 Datasheet
Download SN54LS10 Datasheet
SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES SDLS035A – D.
SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES SDLS035A – DECEMBER 1983 – REVISED APRIL 2003 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. •POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 2003, Texas Instruments Inco.


SN54LS10 | Motorola Inc
TRIPLE 3-INPUT NAND GATE
Download SN54LS10 Datasheet
Download SN54LS10 Datasheet
SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 LOW POWER SCH.
SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND 14 1 J SUFFIX CERAMIC CASE 632-08 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — .


SN54LS107A | Texas Instruments
DUAL J-K FLIP-FLOPS
Download SN54LS107A Datasheet
Download SN54LS107A Datasheet
SN54107, SN54LS107A, SN74107, SN74LS107A DUAL J-K FLIP-FLOPS WITH CLEAR SDLS036 – DECEMBER 1983 – RE.
SN54107, SN54LS107A, SN74107, SN74LS107A DUAL J-K FLIP-FLOPS WITH CLEAR SDLS036 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. •POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1988, Texas Instruments Incorporated 1 SN541.


SN54LS107A | Motorola Inc
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Download SN54LS107A Datasheet
Download SN54LS107A Datasheet
SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop w.
SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW. The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins. DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOT.


SN54LS109A | Texas Instruments
Dual J-K Positive-Edge-Triggered Flip-Flops
Download SN54LS109A Datasheet
Download SN54LS109A Datasheet
PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30.
PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30109BEA Status Package Type Package Pins Package (1) Drawing Qty ACTIVE CDIP J 16 1 Eco Plan (2) TBD JM38510/30109BFA ACTIVE CFP W 16 1 TBD JM38510/30109BFA ACTIVE CFP W 16 1 TBD M38510/30109BEA ACTIVE CDIP J 16 1 TBD M38510/30109BEA ACTIVE CDIP J 16 1 TBD M38510/30109BFA ACTIVE CFP W 16 1 TBD M38510/30109BFA ACTIV.


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