SN54LS298

SN54/74LS298 QUAD 2-INPUT MULTIPLEXER WITH STORAGE The SN54 / 74LS298 is a Quad 2-Port Register. It is the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register. A Common Select input selects between two 4-bit input ports (data sources.) The selected data is transferred to the output register synchronous with the HIGH to LOW transition of the Clock input. The LS298 is fabricated with the Schottky barrier process for high speed and is completely compatible with all Motorola TTL families. QUAD 2-INPUT MULTIPLEXER WITH STORAGE LOW POWER SCHOTTKY Select From Two Data Sources Fully Edge-Triggered Operation Typical Power Dissipation of 65 mW Input Clamp Diodes Limit High Speed Termination Effects 16 1 J SUFFIX CERAMIC CASE 620-09 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 Qa 15 Qb 14 Qc 13 Qd 12 CP 11 S 10 I0c 9 16 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 N SUFFIX PLASTIC CASE 648-08 16 1 I1b 2 I1a 3 I0a 4 I0b 5 I1c 6 I1d 7 I0d 8 GND 1 D SUFFIX SOIC CASE 751B-03 ORDERING INFORMATION PIN NAMES LOADING (Note a) HIGH S CP I0a – I0d I1a – I1d Qa – Qd Common Select Input Clock (Active LOW Going Edge) Input Data Inputs From Source 0 Data Inputs From Source 1 Register Outputs (Note b) 0.5 U.L. 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOGIC SYMBOL 3 2 4 1 9 5 7 ...