SN65173

SN55173, SN65173, SN75173 QUADRUPLE DIFFERENTIAL LINE RECEIVERS D Meet or Exceed the Requirements of TIA/EIA-422-B, TIA/EIA-423-B, and TIA/EIA-485-A and ITU Recommendations V.10, V.11, X.26, and X.27 D Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments D 3-State Outputs D Common-Mode Input Voltage Range of – 12 V to 12 V D Input Sensitivity . . . ± 200 mV D Input Hysteresis . . . 50 mV Typ D High Input Impedance . . . 12 kΩ Min D Operate From Single 5-V Supply D Low Power Requirements D Pin-to-Pin Replacement for AM26LS32 SLLS144E – OCTOBER 1980 – REVISED APRIL 2000 SN55173 . . . J PACKAGE SN65173, SN75173 . . . D OR N PACKAGE (TOP VIEW) 1B 1 1A 2 1Y 3 G4 2Y 5 2A 6 2B 7 GND 8 16 VCC 15 4B 14 4A 13 4Y 12 G 11 3Y 10 3A 9 3B SN55173 . . . FK PACKAGE (TOP VIEW) 1A 1B NC VCC 4B description The SN55173, SN65173, and SN75173 are monolithic quadruple differential line receivers with 3-state outputs. They are designed to meet the requirements of TIA/EIA-422-B, TIA/EIA-423-B, TIA/EIA-485-A, and several ITU recommendations. The standards are for balanced multipoint bus transmission at rates up to 10 megabits per second. The four receivers share two OR enable inputs, one active when high, the other active when low. These devices feature high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range of – 12 V to 12 V. Fail-safe design specifies that if the inputs are open ci...