SN65LBC176-Q1

SN65LBC176-Q1 SGLS211B – OCTOBER 2003 – REVISED JANUARY 2023 SN65LBC176-Q1 Differential Bus Transceiver 1 Features Qualified for automotive applications Bidirectional transceiver Meet or exceed the requirements of ANSI standard RS-485 and ISO 8482:1987(E) High-speed low-power LinBiCMOS circuitry Designed for high-speed operation in both serial and parallel applications Low skew Designed for multipoint transmission on long bus lines in noisy environments Very low disabled supply-current requirements: 200 μA maximum Wide positive and negative input/output bus voltage ranges Driver Output Capacity: ±60 mA Thermal-Shutdown Protection Driver positive-and negative-current limiting Open-Circuit Fail-Safe Receiver Design Receiver input sensitivity: ±200 mV max Receiver input hysteresis: 50 mV typical Operate from a single 5-V supply Glitch-free power-up and power-down protection 3 DE 4 D 2 RE 1 R 2 Description The SN65LBC176 differential bus transceiver is a monolithic, integrated circuit designed for bidirectional data communication on multipoint bus-transmission lines. It is designed for balanced transmission lines and meets ANSI Standard RS-485 and ISO 8482:1987(E). The SN65LBC176 combines a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, which can externally connect together to function...