SN74ABT16373A-EP

www.ti.com FEATURES Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product Change Notification Qualification Pedigree (1) Member of the Texas Instruments Widebus™ Family State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C High-Impedance State During Power Up and Power Down Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs (–24-mA IOH, 48-mA IOL) Plastic 300-mil Shrink Small-Outline (DL) Package (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold-compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. SN74ABT16373A-EP 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS810 – MARCH 2006 DL PACKAGE (TOP VIEW) 1OE 1 1Q1 2 1Q2 3 GND 4 1Q3 5 1Q4 6 VCC 7 1Q5 8 1Q6 9 GND 10 1Q7 11 1Q8 12 2Q1 1...