SN74ABT18504

Members of the Texas Instruments SCOPE ™ Family of Testability Products Members of the Texas Instruments Widebus ™ Family Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture UBT ™ (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode Two Boundary-Scan Cells per I/O for Greater Flexibility State-of-the-Art EPIC-ΙΙB ™ BiCMOS Design Significantly Reduces Power Dissipation SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 SCOPE ™ Instruction Set – IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, and P1149.1A CLAMP and HIGHZ – Parallel Signature Analysis at Inputs With Masking Option – Pseudo-Random Pattern Generation From Outputs – Sample Inputs/Toggle Outputs – Binary Count From Outputs – Device Identification – Even-Parity Opcodes Packaged in 64-Pin Plastic Thin Quad Flat Pack Using 0.5-mm Center-to-Center Spacings and 68-Pin Ceramic Quad Flat Pack Using 25-mil Center-to-Center Spacings SN54ABT18504 . . . HV PACKAGE (TOP VIEW) A3 A2 A1 GND OEBA LEBA TDO VCC NC TMS CLKBA CLKENBA B1 GND B2 B3 B4 A4 A5 A6 GND A7 A8 A9 A10 NC VCC A11 A12 A13 GND A14 A15 A16 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 11 59 12 58 13 57 14 56 15 55 16 54 17 53 18 52 19 51 20 50 21 49 22 48 23 47 24 46 25 45 26 44 27 28 29 30 31...