D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V
SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR...
D 2-V to 6-V VCC Operation D Inputs Accept
Voltages to 6 V
SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7
14 VCC 13 1C 12 1Y 11 3A 10 3B 9 3C 8 3Y
SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES
SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003
D Max tpd of 6.5 ns at 5 V
SN54AC10 . . . FK PACKAGE (TOP VIEW)
1C
VCC
NC
1A
1B
2A
3 2 1 20 19
4
18
1Y
NC 5
17 NC
2B 6
16 3A
NC 7
15 NC
2C 8
14 3B
9 10 11 12 13
3C
3Y
NC
GND
2Y
description/ordering information
NC − No internal connection
The ’AC10 devices contain three independent 3-input NAND gates. The devices perform the Boolean function Y = A B C or Y = A + B + C in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP − N
Tube
SN74AC10N
SN74AC10N
SOIC − D
Tube Tape and reel
SN74AC10D SN74AC10DR
AC10
−40°C to 85°C
SOP − NS SSOP − DB
Tape and reel Tape and reel
SN74AC10NSR SN74AC10DBR
AC10 AC10
TSSOP − PW
Tube Tape and reel
SN74AC10PW SN74AC10PWR
AC10
CDIP − J
Tube
SNJ54AC10J
SNJ54AC10J
−55°C to 125°C CFP − W
Tube
SNJ54AC10W
SNJ54AC10W
LCCC − FK
Tube
SNJ54AC10FK
SNJ54AC10FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE (each gate)
INPUTS
A
B
C
OUTPUT Y
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
Please be aware that an important no...