SN74AS374

SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 D D-Type Flip-Flops in a Single Package With 3-State Bus Driving True Outputs D Full Parallel Access for Loading D Buffered Control Inputs D Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs description These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. SN54ALS374A, SN54AS374 . . . J PACKAGE SN74ALS374A, SN74AS374 . . . DW OR N PACKAGE (TOP VIEW) OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 2 3 4 5 6 7 8 9 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 CLK SN54ALS374A, SN54AS374 . . . FK PACKAGE (TOP VIEW) 1D 1Q OE VCC 8Q On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup compon...