SN74AUC2G86

www.ti.com SN74AUC2G86 DUAL 2-INPUT EXCLUSIVE-OR GATE SCES479B – AUGUST 2003 – REVISED JANUARY 2007 FEATURES Available in the Texas Instruments NanoFree™ Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub-1-V Operable Max tpd of 1.7 ns at 1.8 V DCT PACKAGE (TOP VIEW) Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DCU PACKAGE (TOP VIEW) YZP PACKAGE (BOTTOM VIEW) 1A 1 1B 2 2Y 3 8 VCC 7 1Y 6 2B 1A 1B 2Y GND 1 2 3 4 8 VCC 7 1Y 6 2B 5 2A GND 4 5 2A 2Y 3 6 2B 1B 2 7 1Y 1A 1 8 VCC GND 4 5 2A See mechanical drawings for dimensions. DESCRIPTION/ORDERING INFORMATION This dual 2-input exclusive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specif...