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SN74AVCH2T45
SCES582H – JULY 2...
Product Folder
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Technical Documents
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SN74AVCH2T45
SCES582H – JULY 2004 – REVISED APRIL 2015
SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-State Outputs
1 Features
1 Available in the Texas Instruments NanoFree™ Package
VCC Isolation 2-Rail Design I/Os are 4.6 V Tolerant Partial Power-Down-Mode Operation Bus Hold on Data Inputs Maximum Data Rates
– 500 Mbps (1.8 V to 3.3 V) – 320 Mbps (< 1.8 V to 3.3 V) – 320 Mbps (Level-Shifting to 2.5 V or 1.8 V) – 280 Mbps (Level-Shifting to 1.5 V) – 240 Mbps (Level-Shifting to 1.2 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22
2 Applications
Smartphone Servers Desktop PCs and Notebooks Other Portable Devices
3 Description
This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track VCCA and accepts any supply
voltage from 1.2 V to 3.6 V. The B ports are designed to track VCCB and accepts any supply
voltage from 1.2 V to 3.6 V. This allows for universal low-
voltage bidirectional translation and level-shifting between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V
voltage nodes.
The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data...