SN74HC139-Q1 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER
D Qualified for Automotive Applications D Targeted Specificall...
SN74HC139-Q1 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER
D Qualified for Automotive Applications D Targeted Specifically for High-Speed
Memory Decoders and Data-Transmission Systems
D Wide Operating
Voltage Range of 2 V to 6 V D Outputs Can Drive up to Ten LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 10 ns D ±4-mA Output Drive at 5 V
SCLS598B − NOVEMBER 2004 – REVISED APRIL 2008
D Low Input Current of 1 µA Max D Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
D ESD Protection Level per AEC-Q100
Classification − 2000-V (H2) Human-Body Model − 200-V (M3) Machine Model − 1000-V (C5) Charged-Device Model
D OR PW PACKAGE (TOP VIEW)
description/ordering information
The SN74HC139 device is designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
1G 1A 1B 1Y0 1Y1 1Y2 1Y3 GND
1 2 3 4 5 6 7 8
16 VCC 15 2G 14 2A 13 2B 12 2Y0 11 2Y1 10 2Y2 9 2Y3
The SN74HC139 device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable (G) input can be used as a data line in demu...
