SN74LS107A

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW. The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins. SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) VCC CD1 CP1 14 13 12 K2 11 CD2 CP2 10 9 J2 8 1234567 J1 Q1 Q1 K1 Q2 Q2 GND NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 14 1 14 1 J SUFFIX CERAMIC CASE 632-08 N SUFFIX PLASTIC CASE 646-06 LOGIC SYMBOL 1 2 1J Q3 8J Q5 12 CP 9 CP 4K Q2 CD 11 KQ CD 6 13 VCC = PIN 14 GND = PIN 7 10 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXD SOIC GUARANTEED OPERATING RANGES Symbol Paramete...