SN74LS174

HEX D FLIP-FLOP The LSTTL / MSI SN54 / 74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. The LS174 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. Edge-Triggered D-Type Inputs Buffered-Positive Edge-Triggered Clock Asynchronous Common Reset Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) VCC Q5 D5 D4 Q4 D3 Q3 CP 16 15 14 13 12 11 10 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 2 3 4 56 78 MR Q0 D0 D1 Q1 D2 Q2 GND PIN NAMES LOADING (Note a) HIGH LOW D0 – D5 CP MR Q0 – Q5 Data Inputs Clock (Active HIGH Going Edge) Input Master Reset (Active LOW) Input Outp...