SN74LS290 Datasheet
SN74LS290
DECADE COUNTER; 4-BIT BINARY COUNTER
The SN54/74LS290 and SN54/74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS290) or divide-by-eight (LS293) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP)to form BCD, Bi-quinary, or Modulo-16 counters. Both of the counters have a 2-input gated Master Reset (Clear), and the LS290 also has a 2-input gated Master Set (Preset 9).
• Corner Power Pin Versions of the LS90 and LS93 • Low Power Consumption . . . Typically 45 mW • High Count Rates . . . Typically 42 MHz • Choice of Counting Modes . . . BCD, Bi-Quinary, Binary • Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC MR MR CP1 CP0 Q0 Q3 14 13 12 11 10 9 8
LS290
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Pa.
Part Number |
SN74LS290 |
Manufacturers |
Texas Instruments |
Logo |
|
Description |
DECADE AND 4-BIT BINARY COUNTERS |
Datasheet |
SN74LS290 Datasheet (PDF) |
SN54290, SN54293, SN54LS290, SN54LS293
SN74290, SN74293, SN74LS290, SN74LS293
DECADE AND 4-BIT BINARY COUNTERS
SDLS097 – MARCH 1974 – REVISED MARCH 1988
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1988, Texas Instruments Incorporated 1
SN54290, SN54293, SN54LS290, SN54LS293 SN74290, SN74293, SN74LS290, SN74LS293 DECADE AND 4-BIT BINARY COUNTERS
SDLS097 – MARCH 1974 – REVISED MARCH 1988
•2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN54290, SN54293, S.
Part Number |
SN74LS290 |
Manufacturers |
Motorola |
Logo |
|
Description |
DECADE COUNTER 4-BIT BINARY COUNTER |
Datasheet |
SN74LS290 Datasheet (PDF) |
DECADE COUNTER; 4-BIT BINARY COUNTER
The SN54 / 74LS290 and SN54/ 74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS290) or divide-by-eight (LS293) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP)to form BCD, Bi-quinary, or Modulo-16 counters. Both of the counters have a 2-input gated Master Reset (Clear), and the LS290 also has a 2-input gated Master Set (Preset 9).
• Corner Power Pin Versions of the LS90 and LS93 • Low Power Consumption . . . Typically 45 mW • High Count Rates . . . Typically 42 MH.
DECADE COUNTER
SN74LS290
DECADE COUNTER; 4-BIT BINARY COUNTER
The SN54/74LS290 and SN54/74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS290) or divide-by-eight (LS293) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP)to form BCD, Bi-quinary, or Modulo-16 counters. Both of the counters have a 2-input gated Master Reset (Clear), and the LS290 also has a 2-input gated Master Set (Preset 9).
• Corner Power Pin Versions of the LS90 and LS93 • Low Power Consumption . . . Typically 45 mW • High Count Rates . . . Typically 42 MHz • Choice of Counting Modes . . . BCD, Bi-Quinary, Binary • Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC MR MR CP1 CP0 Q0 Q3 14 13 12 11 10 9 8
LS290
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1234567 MS NC MS Q2 Q1 NC GND
VCC MR MR CP1 CP0 Q0 Q3 14 13 12 11 10 9 8
http://onsemi.com
DECADE COUNTER; 4-BIT BINARY COUNTER
LOW POWER SCHOTTKY
14 1
14 1
14 1
J SUFFIX CERAMIC CASE 632-08
N SUFFIX PLASTIC CASE 646-06
D SUFFIX SOIC
CASE 751A-02
LS293
1234567 NC NC NC Q2 Q1 NC GND
ORDERING INFORMATION
SN54LSXXXJ SN74LSXXXN SN74LSXXXD
Ceramic Plastic SOIC
PIN NAMES
LOADING (Note a)
CP0 CP1 CP1 MR1, MR2 MS1, MS2 Q0 Q1, Q2, Q3
Clock (Active LOW going edge) Input to ÷ 2 Section. .
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