SN74LV393A-Q1
SCLS515D – JULY 2003 – REVISED MARCH 2023
SN74LV393A-Q1 Dual 4-Bit Binary Counter
1 Features
• VCC operat...
SN74LV393A-Q1
SCLS515D – JULY 2003 – REVISED MARCH 2023
SN74LV393A-Q1 Dual 4-Bit Binary Counter
1 Features
VCC operation of 2 V to 5.5 V Maximum tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at
VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at
VCC = 3.3 V, TA = 25°C Support Mixed-Mode
Voltage Operation on All
Ports Ioff Supports Partial-Power-Down Mode Operation Latch-up Performance Exceeds 250 mA Per JESD
17
2 Applications
Synchronize invterted clock inputs Debounce a switch Invert a digital signal
3 Description
The 'LV393A devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices are designed for 2 V to 5.5 V VCC operation.
Package Information
PART NUMBER
PACKAGE(1)
BODY SIZE (NOM)
SN74LV393A-Q1
PW (TSSOP, 14)
5 mm x 4.4 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
Figure 3-1. Logic Diagram, Each Counter (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
SN74LV393A-Q1
SCLS515D – JULY 2003 – REVISED MARCH 2023
www.ti.com
Table of Contents
1 Features............................................................................1 2 Applications............................
