SN74LVC138A

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LVC138A, SN74LVC138A SCAS291W – MARCH 1993 – REVISED OCTOBER 2016 SN74LVC138A 3-Line to 8-Line Decoders Demultiplexers 1 Features 1 Operate From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 5.8 ns at 3.3 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C Latch-Up Performance Exceeds 250 mA Per JESD 17 3 Description The SN74LVC138A devices are designed for highperformance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. 2 Applications LED Displays Servers White Goods Power Infrastructure Building Automation Factory Automation Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LCCC (20) 8.89 mm × 8.89 mm CDIP (16) 19.56 mm × 6.92 mm CFP (16) 10.30 mm × 6.73 mm SOIC (16) 9.90 mm × 3.91 mm SNx4LVC138A SSOP (16) TVSOP (16) 6.20 mm × 5.30 mm 3.60 mm × 4.40 mm BGA MICROSTAR JUNIOR (20) 4.00 mm × 3.00 mm TSSOP (16) 5.00 mm × 4.40 mm U...