SN74LVC2G08 Datasheet
Part Number |
SN74LVC2G08 |
Manufacturers |
Texas Instruments |
Logo |
|
Description |
Dual 2-Input Positive-AND Gate |
Datasheet |
SN74LVC2G08 Datasheet (PDF) |
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SN74LVC2G08
SCES198N – APRIL 1999 – REVISED DECEMBER 2015
SN74LVC2G08 Dual 2-Input Positive-AND Gate
1 Features
•1 Available in the Texas Instruments NanoStar™ and NanoFree™ Package
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.7 ns at 3.3 V • Low Power Consumption, 10-μA Maximum ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection • Can Be Used as a Down Translator to Translate
Inputs From a Maximum of 5.5 V Down to the VCC Level • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human Body Model (A114-A) – 1000-V Charged-Device Model (C101)
2 Applications
• IP Phones: Wired and Wireless • Optical Networking: EP.
SN74LVC2G08-Q1
www.ti.com
SCES557D – MARCH 2004 – REVISED MARCH 2010
DUAL 2-INPUT POSITIVE-AND GATE
Check for Samples: SN74LVC2G08-Q1
FEATURES
1
• Qualified for Automotive Applications
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V
• Max tpd of 4.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model.
www.ti.com
SN74LVC2G08-EP DUAL 2-INPUT POSITIVE-AND GATE
SGDS032 – SEPTEMBER 2007
FEATURES
1
• Controlled Baseline
– One Assembly
– One Test Site
– One Fabrication Site
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree (1)
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V
• Max tpd of 5.7 ns at 3.3 V • Low Power Consumption, 10 μA Max ICC • ±24 mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not li.
SN74LVC2G07-EP
www.ti.com .... SCES719 – MAY 2008
DUAL BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS
FEATURES
1
• Controlled Baseline
– One Assembly Site
– One Test Site
– One Fabrication Site
• Extended Temperature Performance of –55°C to 125°C
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree (1)
• Supports 5-V VCC Operation
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond .
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SN74LVC2G07
SCES308L – AUGUST 2001 – REVISED MAY 2015
SN74LVC2G07 Dual Buffer and Driver With Open-Drain Outputs
1 Features
•1 Dual Open-Drain Buffer Configuration • -24-mA Output Drive at 3.3 V • Support Translation-Up and Down • Available in the Texas Instruments
NanoFree™ Package • Supports 5-V VCC Operation • Inputs and Open-Drain Outputs Accept Voltages
Up to 5.5 V • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion.
Dual 2-Input Positive-AND Gate
Product Folder
Sample & Buy
Technical Documents
Tools & Software
Support & Community
SN74LVC2G08
SCES198N – APRIL 1999 – REVISED DECEMBER 2015
SN74LVC2G08 Dual 2-Input Positive-AND Gate
1 Features
•1 Available in the Texas Instruments NanoStar™ and NanoFree™ Package
• Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.7 ns at 3.3 V • Low Power Consumption, 10-μA Maximum ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection • Can Be Used as a Down Translator to Translate
Inputs From a Maximum of 5.5 V Down to the VCC Level • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human Body Model (A114-A) – 1000-V Charged-Device Model (C101)
2 Applications
• IP Phones: Wired and Wireless • Optical Networking: EPON and Video Over Fiber • Point-to-Point Microwave Backhaul • Power: Telecom DC/DC Module: Analog • Power: Telecom DC/DC Module: Digital • Private Branch Exchange (PBX) • Telecom Shelter: Power Distribution Unit (PDU) • Vector Signal Analyzers and Generators • Wireless Communications Testers • Wireless Repeaters • xDSL Modem/DSLAM
3 Description
This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G08 device performs the Boolean function Y = A x B or Y =.
2020-02-05 : INA2322 INA203-Q1 INA203 INA204 INA205 INA206 INA207 INA208 INA201-Q1 INA202-Q1