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SN74LVC2G32-EP

Texas Instruments

Dual 2-Input Positive-OR Gate

www.ti.com FEATURES • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Extended Temperature Performa...


Texas Instruments

SN74LVC2G32-EP

File Download Download SN74LVC2G32-EP Datasheet


Description
www.ti.com FEATURES Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 3.8 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. SN74LVC2G32-EP DUAL 2-INPUT POSITIVE-OR GATE SCES543A – FEBRUARY 2004 – REVISED AUGUST 2006 Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial Power-Down-Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DCU PACKAGE (TOP VIEW) 1A 1B 2Y GND 1 2 3 4 8 VCC 7 1Y 6 2B 5 2A DESCRIPTION/ORDERING INFORMATIO...




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