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SN74LVC2G32 Datasheet

Part Number SN74LVC2G32
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual 2-Input Positive-OR Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G32 Datasheet (PDF)

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC2G32 SCES201N – APRIL 1999 – REVISED SEPTEMBER 2015 SN74LVC2G32 Dual 2-Input Positive-OR Gate 1 Features •1 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Maximum tpd of 3.8 ns at 3.3 V • Low Power Consumption, 10-µA Maximum ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C .

  SN74LVC2G32   SN74LVC2G32






Part Number SN74LVC2G38
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual 2-Input NAND Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G38 Datasheet (PDF)

www.ti.com SN74LVC2G38 SCES554D – MARCH 2004 – REVISED DECEMBER 2013 Dual 2-Input NAND Gate With Open-Drain Outputs Check for Samples: SN74LVC2G38 FEATURES 1 •2 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC =.

  SN74LVC2G32   SN74LVC2G32







Part Number SN74LVC2G34-EP
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual Buffer Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G34-EP Datasheet (PDF)

www.ti.com FEATURES • Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site • Extended Temperature Performance of –55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or.

  SN74LVC2G32   SN74LVC2G32







Part Number SN74LVC2G34
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual Buffer Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G34 Datasheet (PDF)

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC2G34 SCES359J – AUGUST 2001 – REVISED OCTOBER 2015 SN74LVC2G34 Dual Buffer Gate 1 Features •1 Available in the Texas Instruments NanoFree™ Package • Supports 5.5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Maximum tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-µA Maximum ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VO.

  SN74LVC2G32   SN74LVC2G32







Part Number SN74LVC2G32-Q1
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual 2-Input Positive-OR Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G32-Q1 Datasheet (PDF)

SN74LVC2G32-Q1 www.ti.com SCES842 – AUGUST 2012 DUAL TWO-INPUT POSITIVE-OR GATE Check for Samples: SN74LVC2G32-Q1 FEATURES 1 •2 Qualified for Automotive Applications • AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level H2 – Device CDM ESD Classification Level C3B • Inputs Accept Voltages to 5.5 V • Max Propagation (Delay) Time of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Ma.

  SN74LVC2G32   SN74LVC2G32







Part Number SN74LVC2G32-EP
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual 2-Input Positive-OR Gate
Datasheet SN74LVC2G32 DatasheetSN74LVC2G32-EP Datasheet (PDF)

www.ti.com FEATURES • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Extended Temperature Performance of –55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 3.8 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°.

  SN74LVC2G32   SN74LVC2G32







Dual 2-Input Positive-OR Gate

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC2G32 SCES201N – APRIL 1999 – REVISED SEPTEMBER 2015 SN74LVC2G32 Dual 2-Input Positive-OR Gate 1 Features •1 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Maximum tpd of 3.8 ns at 3.3 V • Low Power Consumption, 10-µA Maximum ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection • Can Be Used as a Down Translator to Translate Inputs From a Maximum of 5.5 V Down to the VCC Level • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human Body Model (A114-A) – 1000-V Charged-Device Model (C101) 3 Description This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G32 device performs the Boolean function Y + A ) B or Y + A • B in positive logic. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Device Information(1) PART NUMBER PACKAGE BODY SIZE SN74LVC2G32DCT SSOP (8).


2020-02-05 : INA2322    INA203-Q1    INA203    INA204    INA205    INA206    INA207    INA208    INA201-Q1    INA202-Q1   


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