SN74S1051

D Designed to Reduce Reflection Noise D Repetitive Peak Forward Current to 200 mA D 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 12-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND. SN74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS018B – SEPTEMBER 1990 – REVISED MARCH 2003 D, N, NS, OR PW PACKAGE (TOP VIEW) VCC D01 D02 D03 D04 D05 D06 GND 1 2 3 4 5 6 7 8 16 VCC 15 D12 14 D11 13 D10 12 D09 11 D08 10 D07 9 GND ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74S1051N SN74S1051N 0°C to 70°C SOIC – D Tube Tape and reel SN74S1051D SN74S1051DR S1051 SOP – NS Tape and reel SN74S1051NSR 74S1051 TSSOP – PW Tape and reel SN74S1051PWR S1051 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. schematic diagrams D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12 2 3 4 5 6 7 10 11 12 13 14 15 VCC VCC 1 16 89 GND GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products confor...