SN65C1154, SN75C1154 QUADRUPLE LOW-POWER DRIVERS/RECEIVERS
D Meet or Exceed the Requirements of
TIA/EIA-232-F and ITU R...
SN65C1154, SN75C1154 QUADRUPLE LOW-POWER DRIVERS/RECEIVERS
D Meet or Exceed the Requirements of
TIA/EIA-232-F and ITU Recommendation
V.28
D Very Low Power Consumption . . .
5 mW Typ
D Wide Driver Supply
Voltage . . .
±4.5 V to ±15 V
D Driver Output Slew Rate Limited to
30 V/µs Max
D Receiver Input Hysteresis . . . 1000 mV Typ D Push-Pull Receiver Outputs D On-Chip Receiver 1-µs Noise Filter
description/ordering information
SLLS151D – DECEMBER 1988 – REVISED APRIL 2003
SN65C1154 . . . N PACKAGE SN75C1154 . . . DW, N, OR NS PACKAGE
(TOP VIEW)
VDD 1 1RA 2 1DY 3 2RA 4 2DY 5 3RA 6 3DY 7 4RA 8 4DY 9 VSS 10
20 VCC 19 1RY 18 1DA 17 2RY 16 2DA 15 3RY 14 3DA 13 4RY 12 4DA 11 GND
The SN65C1164 and SN75C1154 are low-power BiMOS devices containing four independent drivers and receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices are designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN65C1154 and SN75C1154 are similar to those of the SN75C188 quadruple driver and SN75C189A quadruple receiver, respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/µs and the receivers have filters that reject input noise pulses of shorter than 1 µs. Both these features eliminate the need for external components.
The SN65C1154 and SN75C1154 have been designed using low-power techniques in a BiMOS technology. In most applications, the receivers contained in these devic...