SNJ54BCT646JT

D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ D Bus Transceivers/ Registers D Independent Registers and Enables for A and B Buses SN54BCT646 . . . JT OR W PACKAGE SN74BCT646 . . . DW OR NT PACKAGE (TOP VIEW) SN54BCT646, SN74BCT646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCBS037D − AUGUST 1989 − REVISED MAY 2004 D Multiplexed Real-Time and Stored Data D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) SN54BCT646 . . . FK PACKAGE (TOP VIEW) DIR SAB CLKAB NC VCC CLKBA SBA CLKAB 1 SAB 2 DIR 3 A1 4 A2 5 A3 6 A4 7 A5 8 A6 9 A7 10 A8 11 GND 12 24 VCC 23 CLKBA 22 SBA 21 OE 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 B8 4 3 2 1 28 27 26 A1 5 25 OE A2 6 24 B1 A3 7 23 B2 NC 8 22 NC A4 9 21 B3 A5 10 20 B4 A6 1112 13 14 15 16 17 19 18 B5 A7 A8 GND NC B8 B7 B6 description/ordering information NC − No internal connection These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices. Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mo...