32-bit MCU
SPC56AP60x, SPC56AP54x SPC560P60x, SPC560P54x
32-bit Power Architecture® based MCU with 1088KB Flash memory and 80KB RAM...
Description
SPC56AP60x, SPC56AP54x SPC560P60x, SPC560P54x
32-bit Power Architecture® based MCU with 1088KB Flash memory and 80KB RAM for automotive chassis and safety applications
Datasheet - production data
LQFP100 14 x 14 mm
LQFP144 20 x 20 mm
Features
AEC-Q10x qualified
64 MHz, single issue, 32-bit CPU core complex (e200z0h) – Compliant with Power Architecture® embedded category – Variable Length Encoding (VLE)
Memory organization – Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller – Up to 80 KB on-chip SRAM with ECC
Fail safe protection – ECC protection on system SRAM and Flash – Safety port – SWT with servicing sequence pseudorandom generator – Power management – Non-maskable interrupt for both cores – Fault collection and control unit (FCCU) – Safe mode of system-on-chip (SoC) – Register protection scheme
Nexus® L2+ interface
Single 3.3 V or 5 V supply for I/Os and ADC
2 on-platform peripherals set with 2 INTC
16-channel eDMA controller with multiple transfer request sources
General purpose I/Os (80 GPIO + 26 GPI on LQFP144; 49 GPIO + 16 GPI on LQFP100)
2 general purpose eTimer units – 6 timers, each with up/down count capabilities
– 16-bit resolution, cascadable counters
– Quadrature decode with rotation direction flag
– Double buffer input capture and output compare
Communications interfaces
– 2 LINFlex modules (LIN 2.1, 1 × Master/Slave, 1 × Master Only)
– 5 DSPI mo...
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