SPC58NN84E7

SPC584Nx, SPC58ENx, SPC58NNx 32-bit Power Architecture microcontroller for automotive ASIL-D applications Datasheet - production data FPBGA292 (17 x 17 x 1.8 mm) eLQFP176 (24 x 24 x 1.4 mm) Features AEC-Q100 qualified 32-bit Power Architecture VLE compliant CPU cores: – Five enhanced main e200z4256n3 cores, dual issue, two paired in lockstep – Floating Point, End-to-End Error Correction 6576 KB (6288 KB code flash + 288 KB data flash) on-chip flash memory: – supports read during program and erase operations, and multiple blocks allowing EEPROM emulation – Supports read while read between the two code Flash partitions. 128 KB on-chip general-purpose SRAM (in addition to 384 KB included in the CPUs) 96-channel direct memory access controller (eDMA) Comprehensive new generation ASIL-D safety concept – ASIL-D of ISO 26262 – FCCU for collection and reaction to failure notifications – Memory Error Management Unit (MEMU) for collection and reporting of error events in memories – Cyclic redundancy check (CRC) unit Junction temperature range -40 °C to 165 °C Dual-channel FlexRay controller Hardware Security Module (HSM) GTM344 - generic timer module – Intelligent complex timer module – 144 channels (48 input and 96 output) – 5 programmable fine grain multi-threaded cores – 61 KB of dedicated RAM – 24-bit wide channels Enhanced analog-to-digital converter system with: – 1 supervisor 12-bit SAR analog converter – 2 separate 10-bit SAR analog converter – 4 separ...