ST2341S23RG

ST2341S23RG P Channel Enhancement Mode MOSFET -5.3A DESCRIPTION ST2341S23RG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package. PIN CONFIGURATION SOT-23-3L 3 D GS 12 1.Gate 2.Source 3.Drain FEATURE -20V/-3.3A, RDS(ON) = 30m-ohm (Typ.) @VGS = -4.5V -20V/-2.8A, RDS(ON) = 40m-ohm @VGS = -2.5V -20V/-2.3A, RDS(ON) = 53m-ohm @VGS = -1.8V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design PART MARKING SOT-23-3L 3 41YA 12 Y: Year Code A: Process Code STANSON TECHNOLOGY 120 ...