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R
ST92195
64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
BRIEF DATA
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www.DataSheet4U.com
R
ST92195
64K ROM H
CMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
BRIEF DATA
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Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes 0°C to +70°C Operating Temperature Range available Up to 24 MHz Operation @ 5V±10% Minimum instruction cycle time: 375nS at 16MHz internal clock 64K Bytes ROM 256 Bytes RAM of Register file (accumulators or index registers) 256 Bytes of on-chip static RAM 8K Bytes of TDSRAM (Teletext and Display RAM) 56-lead Shrink DIP package 28 fully programmable I/O pins Serial Peripheral Interface Flexible Clock controller for OSD, Data Slicer and Core clocks running from one single low frequency external crystal. Enhanced Display Controller with 26 rows of 40/80 characters – Serial and Parallel attributes – 10x10 dot Matrix, 512 ROM characters, definable by user – 4/3 and 16/9 supported – Rounding, fringe, double width, double height, scrolling, cursor, full background colour, semitransparent mode and reduced intensity colour supported Teletext unit, including Data slicer, Acquisition Unit and up to 8K Bytes RAM for Data Storage VPS and Wide Screen Signalling slicer Integrated Sync Extractor and Sync Controller 14-bit
Voltage Synthesis for tuning reference
voltage Up to 6 External Interrupts plus 1 non-maskable interrupt
PSDIP56
(See end of Datasheet for Ordering Information)
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8 x 8-bit programmable PWM outputs with 5V open-drain or p...