Arm Cortex-A7 650MHz + Cortex-M4 MPU
STM32MP151A/D
Arm® Cortex®-A7 800 MHz + Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog
Datasheet - pr...
Description
STM32MP151A/D
Arm® Cortex®-A7 800 MHz + Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog
Datasheet - production data
Features
Includes ST state-of-the-art patented technology
Core
32-bit Arm® Cortex®-A7 – L1 32-Kbyte I / 32-Kbyte D – 256-Kbyte unified level 2 cache – Arm® NEON™ and Arm® TrustZone®
32-bit Arm® Cortex®-M4 with FPU/MPU – Up to 209 MHz (Up to 703 CoreMark®)
Memories
External DDR memory up to 1 Gbyte – up to LPDDR2/LPDDR3-1066 16/32-bit – up to DDR3/DDR3L-1066 16/32-bit
708 Kbytes of internal SRAM: 256 Kbytes of AXI SYSRAM + 384 Kbytes of AHB SRAM + 64 Kbytes of AHB SRAM in Backup domain and 4 Kbytes of SRAM in Backup domain
Dual mode Quad-SPI memory interface Flexible external memory controller with up to
16-bit data bus: parallel interface to connect external ICs and SLC NAND memories with up to 8-bit ECC
Security/safety
TrustZone® peripherals, active tamper Cortex®-M4 resources isolation
Reset and power management
1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os) POR, PDR, PVD and BOR On-chip LDOs (RETRAM, BKPSRAM, USB
1.8 V, 1.1 V) Backup regulator (~0.9 V) Internal temperature sensors
LFBGA
TFBGA
LFBGA448 (18 × 18mm) LFBGA354 (16 × 16mm)
Pitch 0.8mm
TFBGA361 (12 × 12 mm) TFBGA257 (10 × 10 mm)
min Pitch 0.5mm
Low-power modes: Sleep, Stop and Standby DDR memory retention in Standby mode Controls for PMIC companion chip
Low-power consumption
Total current consumption down to 2 µA (Standby mode, no RTC, no L...
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