SY2305 Datasheet - P-Channel logic enhancement mode power field effect transistors

SY2305 DESCRIPTION The SY2305 is the P-Channel logic enhancement mode power field effect transistors are produced using ...

SY2305 DESCRIPTION The SY2305 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits, and low in-line power loss are needed in a very small outline surface mount package. APPLICATIONS z Power Management in Note book z Portable Equipment z Battery Powered System z DC/DC Converter z Load Switch z DSC z LCD Display inverter FEATURES -15V/-3.5A,RDS(ON)= 70mΩ@VGS=-4.5V -15V/-3.0A,RDS(ON)= 85mΩ@VGS=-2.5V -15V/-2.0A,RDS(ON)=105mΩ@VGS=-1.8V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design PIN CONFIGURATION(SOT-23-3L) PART MARKING http://www.szsemi.com TEL:0755-36858333 PAGE: 1 Free Datasheet http://www.datasheet4u.net/ SY2305 PIN DESCRIPTION Pin 1 2 3 Symbol G S D Description Gate Source Drain ORDERING INFORMATION Part Number SY2305S23RG SY2305S23RG Package SOT-23-3L SOT-23-3L Part Marking 05YW 05YW ※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 ) ※ SY2305S23RG : Tape Reel ; Pb – Free ※ SY2305S23RGB : Tape Reel ; Pb – Free ; Halogen - Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage Gate –Source Voltage Cont...