RAM. TC518512FL-10LT Datasheet

TC518512FL-10LT Datasheet PDF


TC518512FL-10LT
rOSHIBA
TC518512PL/FL/FIL/TRL-70(Ln/80(Ln /10(Ln
SILICON GATE CMOS
524,288 WORD x 8 BIT CMOS PSEUDO STATIC RAM
Description
The TC518512PL is a 4M bit high speed CMOS pseudo static RAM organized as 524,288 words by 8 bits. The TC518512PL utilizes
a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, .b!gh speed and low power storage. The
TC518512PL operates from a single 5V power supply. Refreshing is supported by a refresh (OEIRFSH) input which enables two
types of refreshing - auto refresh and self refresh. The TC518512PL features a static RAM-like interface with a write cycle in which
the input data is written into the memory cell at the rising edge of RNV thus simplifying the microprocessor interface. The
TC518512PL-(LT) is guaranteed over an operating temperature range of -20 - 7LfC.
The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a small outline plastiC flat package, and a thin small outline
package (forward type, reverse type).
Features
• Organization: 524,288 words x 8 bits
• Single 5V power supply
• Fast access time
TC518512PL-(LT) Family
crtCEA Access Time
toEA N Access Time
tRC Cycle Time
Power DisSipation
Self Refresh Current
-70
70ns
30ns
115ns
385mW
-80
80ns
30ns
130ns
330mW
2201lA
-10
100ns
40ns
160ns
275mW
• Auto refresh is supported by an internal refresh address
counter
• Self refresh is supported by an internal timer
• Inputs and outputs TIL compatible
• Wide operating temperature: -20 - 70DC
• Refresh: 2048 refresh cycles/32ms
• Package
- TC518512PL: DIP32-P-600
- TC518512FL: SOP32-P-525
- TC518512FTL: TSOP32-P-400
- TC518512TRL: TSOP32-P-400A
Pin Names
AO - A18 Address Inputs
RIW
Read/Write Control Input
N/R"F'SR
cr
Output Enable Input
Refresh Input
Chip Enable Input
1/01 - 1/08 Data Inputs/Outputs
Voo
GND
Power
Ground
Pin Connection (Top View)
Al8
A16'
AI4
Al2
A7
A6
AS
A4
A3
A2
Al
AO
1101
1/02
1103
GNO
Voo
AIS
AI7
R/VV
Al3
A8
A9
All
mJRRH
Al0
~
1/08
1107
1106
1/05
1104
Al8
A16
AI4
AI2
A7
A6
AS
A4
A3
A2
Al
AO
1101
1102
1103
GNO
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
0-167


Part TC518512FL-10LT
Description SILICON GATE CMOS PSEUDO STATIC RAM
Feature TC518512FL-10LT; rOSHIBA TC518512PL/FL/FIL/TRL-70(Ln/80(Ln /10(Ln SILICON GATE CMOS 524,288 WORD x 8 BIT CMOS PSEUDO.
Manufacture Toshiba
Datasheet
Download TC518512FL-10LT Datasheet


rOSHIBA TC518512PL/FL/FIL/TRL-70(Ln/80(Ln /10(Ln SILICON GA TC518512FL-10LT Datasheet





TC518512FL-10LT
TC518512PUFUFTLfTRl·70(lT)/SO(lT)/1 O(lT)
Static RAM
Block Diagram
Vee
COLUMN
DECODER
MEMORY
ARRAY
2048 x 256 x8
REFRESH
TIMER
o=
"
o
"
R/Wo----a
Operating Mode
~MODE
Read
Write
cr only Refresh
Auto/Self Refresh
Standby
CE
L
L
L
H
H
OEI
RFSH
L
*
H
L
H
R/W AO -A18 1/01 - 8
H V* OUT
L V* IN
H V* HZ
* * HZ
* * HZ
H = High level input (VIH)
L = Low leveHnput (V1l)
* = V1H orV1L
V* = At the falling edge of CE, all address inputs are latched. At all other times, the address inputs are "*".
HZ = High impedance
Maximum Ratings
SYMBOL
ITEM
VIN Input Voltage
VOUT Output Voltage
Voo Power Supply Voltage
TOPR Operating Temperature
TSTRG Storage Temperature
TSOLOER Soldering Temperature· Time
Po Power Dissipation
lOUT Short Circuit Output Current
RATING
-1.0 - 7.0
-1.0 - 7.0
-1.0 -7.0
-20 - 70
-55 - 150
260· 10
600
50
UNIT
V
V
V
°C
°C
°C· sec
mW
mA
NOTES
1
0-168
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.



TC518512FL-10LT
Static RAM
TC518512PLlFLlFTLlTRL·70(LT)/80(LT)/1 O(LT)
DC Recommended Operating Conditions
SYMBOL
PARAMETER
Voo Power Supply Voltage
VIH Input High Voltage
VIL Input Low Voltage
MIN. TYP. MAX. UNIT NOTES
4.5 5.0
5.5
V
2.4 - Voo + 1.0 V
-1.0 - 0.8 V
2
= =DC Characteristics (Ta -20 - 700C, Voo 5V±10%)
SYMBOL
PARAMETER
Operating Current (Average)
1000 CE, Address cycling: tRC = tRC min.
70ns version
80ns version
1OOns version
100S1
100S2
100F1
100F2
100F3
100F4
II(L)
10(L)
VOH
VOL
Standby Current
CE = VIH, OEIRFSR = VIH
Standby Current
CE = Voo - 0.2V, OO'Rf'SR = Voo - 0.2V
Self Refresh Current (Average)
CE = VIH, 0E/'Rf'SR = VIL
Self Refresh Current (Average)
CE = Voo - 0.2V, C5EiRFSH = 0.2V
Auto Refresh Current (Average)
<5EiI1FSH cycling: tFC = tFC min.
70ns version
80ns version
1OOns version
CE only Refresh Current (Average)
CE, Address cycling: tRC = tRC min.
70ns version
80ns version
1OOns version
Input Leakage Current
OV ~ VIN ~ Voo, All other Inputs not under test = OV
Output Leakage Current
Output Disabled (CE = VIH or OEIRFSR = VIH or R/W = Vld
OV ~ VOUT ~ Voo
Output High Level
10H = -1.0mA
Output Low Level
10L= 2.1mA
MIN. TYP.
- 50
- 45
- 35
--
--
--
- 100
--
--
--
--
--
--
--
--
2.4 -
--
MAX.
70
60
50
UNIT NOTES
rnA 3,4
1 rnA
200 ~
1 rnA
220 ~
70
60 rnA
50
70
60 rnA
50
±10 ~
3
3
±10 ~
-V
0.4 V
Capacitance* (VDO = 5V, Ta = 25°C, f = 1MHz)
SYMBOL
PARAMETER
CI1 Input CapaCitance (AO - A18)
CI2 Input Capacitance (CE, 0E/'Rf'SR, R/W)
CIO Input/Output Capacitance
MIN.
-
-
-
*This parameter is periodically sampled and is not 100% tested.
MAX.
5
7
7
UNIT
pF
TOSHIBA AMERICA ELECTRONIC COMPONENTS. INC.
D~169




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