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E2PROM. TC58BVG2S0HBAI6 Datasheet |
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TC58BVG2S0HBAI6
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
4 GBIT (512M × 8 BIT) CMOS NAND E2PROM
DESCRIPTION
The TC58BVG2S0HBAI6 is a single 3.3V 4 Gbit (4,429,185,024 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 128) bytes × 64 pages × 2048blocks.
The device has a 4224-byte static register which allows program and read data to be transferred between the
register and the memory cell array in 4224-bytes increments. The Erase operation is implemented in a single block
unit (256 Kbytes + 8 Kbytes: 4224 bytes × 64 pages).
The TC58BVG2S0HBAI6 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
The TC58BVG2S0HBAI6 has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected
internally.
FEATURES
• Organization
Memory cell array
Register
Page size
Block size
x8
4224 × 128K × 8
4224 × 8
4224 bytes
(256K + 8K) bytes
• Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Read, Multi Page Program, Multi Block Erase, ECC Status Read
• Mode control
Serial input/output
Command control
• Number of valid blocks
Min 2008 blocks
Max 2048 blocks
• Power supply
VCC = 2.7V to 3.6V
• Access time
Cell array to register 55 µs typ. (Single Page Read) / 90µs typ. (Multi Page Read)
Serial Read Cycle
25 ns min (CL=50pF)
• Program/Erase time
Auto Page Program
Auto Block Erase
340 µs/page typ.
2.5 ms/block typ.
• Operating current
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
30 mA max.
30 mA max
30 mA max
50 µA max
• Package
P-VFBGA67-0608-0.80-001 (Weight: 0.095 g typ.)
• 8bit ECC for each 528Byte is implemented on the chip.
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PIN ASSIGNMENT (TOP VIEW)
12345678
A NC NC
NC NC NC
B NC WP ALE VSS CE WE RY/BY NC
C NC NC RE CLE NC NC NC NC
D NC NC NC NC NC NC
E NC NC NC NC NC NC
F NC NC NC NC NC NC
G NC I/O1 NC NC NC VCC
H NC NC I/O2 NC VCC I/O6 I/O8 NC
J NC VSS I/O3 I/O4 I/O5 I/O7 VSS NC
K NC NC NC
NC NC NC
PIN NAMES
I/O1 to I/O8
CE
WE
RE
CLE
ALE
WP
RY/BY
VCC
VSS
NC
I/O port
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy
Power supply
Ground
No Connection
TC58BVG2S0HBAI6
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BLOCK DIAGRAM
Data register 1
I/O1
to
I/O8
CE
CLE
ALE
WE
RE
WP
RY/BY
I/O
Control circuit
Logic control
RY / BY
ECC Logic
Status register
Address register
Command register
Control circuit
TC58BVG2S0HBAI6
VCC VSS
Column buffer
Column decoder
Data register 0
Sense amp
Memory cell array
HV generator
ABSOLUTE MAXIMUM RATINGS
SYMBOL
RATING
VCC Power Supply Voltage
VIN Input Voltage
VI/O
PD
TSOLDER
TSTG
TOPR
Input /Output Voltage
Power Dissipation
Soldering Temperature (10 s)
Storage Temperature
Operating Temperature
VALUE
−0.6 to 4.6
−0.6 to 4.6
−0.6 to VCC + 0.3 (≤ 4.6 V)
0.3
260
−55 to 125
-40 to 85
CAPACITANCE *(Ta = 25°C, f = 1 MHz)
SYMB0L
PARAMETER
CONDITION
CIN Input
VIN = 0 V
COUT
Output
VOUT = 0 V
* This parameter is periodically sampled and is not tested for every device.
MIN
⎯
⎯
MAX
10
10
UNIT
V
V
V
W
°C
°C
°C
UNIT
pF
pF
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