TF28F008SA Datasheet PDF

28F008SA 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY Extended Temperature Specifications Included Y High-Density Symmetrically-Blocked Architecture Sixteen 64-Kbyte Blocks Y Extended Cycling Capability 100 000 Block Erase Cycles 1 6 Million Block Erase Cycles per Chip Y Automated Byte Write and Block Erase Command User Interface Status Register Y System Performance Enhancements RY BY Status Output Erase Suspend Capability Y Deep Power-Down Mode 0 20.

28F008SA 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY Extended Temperature Specifications Included Y High-Density Symmetrically-Blocked Architecture Sixteen 64-Kbyte Blocks Y Extended Cycling Capability 100 000 Block Erase Cycles 1 6 Million Block Erase Cycles per Chip Y Automated Byte Write and Block Erase Command User Interface Status Register Y System Performance Enhancements RY BY Status Output Erase Suspend Capability Y Deep Power-Down Mode 0 20.