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THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
10-BIT, 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMP...
www.ti.com
THS10064
SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002
10-BIT, 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
FEATURES
D High-Speed 6 MSPS ADC D 4 Analog Inputs D Simultaneous Sampling of 4 Single-Ended
Signals or 2 Differential Signals or
Combination of Both
D Differential Nonlinearity Error: ±1 LSB D Integral Nonlinearity Error: ±1.5 LSB D Signal-to-Noise and Distortion Ratio: 59 dB
at fI = 2 MHz
D Auto-Scan Mode for 2, 3, or 4 Inputs D 3-V or 5-V Digital Interface Compatible D Low Power: 216 mW Max D 5-V Analog Single Supply Operation D Internal
Voltage References . . . 50 PPM/°C
and ±5% Accuracy
D Glueless DSP Interface D Parallel µC/DSP Interface D Integrated FIFO D Available in TSSOP Package D Pin Compatible With 12-Bit THS1206
APPLICATIONS
D Radar Applications D Communications D Control Applications D High-Speed DSP Front-End D Automotive Applications
DESCRIPTION
The THS10064 is a
CMOS, low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected indi...